Designing Latches in Verilog and SystemVerilog
Learn to design a simple level-sensitive latch using SystemVerilog's always_latch construct. Understand how latches retain state based on the input signal, even after it's removed.
Shou-Li Hsu
Shou-Li Hsu is a talented circuit designer from Taiwan, experienced in CPU design and VLSI. He's currently working as a CPU RTL design engineer in a tech company.
Designing Shift Registers in Verilog and SystemVerilog
Learn to design a 4-bit PIPO shift register in Verilog and SystemVerilog. Use this building block to create complex digital circuits. Read on for a simple tutorial.
Designing Priority Encoders in Verilog and SystemVerilog
Priority encoders determine highest-priority input. Basic design uses for loop; enable input design adds enable signal condition. Both can be implemented in Verilog and SystemVerilog.
Designing Adders in Verilog and SystemVerilog
Learn how to design half adder, full adder, and carry ripple adder in Verilog and SystemVerilog. See examples of how to use these digital circuits to add binary numbers.
Designing Counters in Verilog and SystemVerilog
Learn how to design up-counters, bidirectional counters, and gray counters in Verilog and SystemVerilog.
Designing Flip-Flops in Verilog and SystemVerilog
Discover how to design JK, D, SR, and T flip-flops in Verilog and SystemVerilog. With proper syntax and naming conventions, these examples are perfect for beginners.
Designing Multiplexers in Verilog and SystemVerilog
Learn to design multiplexers with Verilog and SystemVerilog through examples of 2:1 and 8:1 MUXes, using ternary operators, parameterized widths, and case statements. Master the fundamentals of digital circuit design with these essential techniques.
Verilog and SystemVerilog Hello World Design
Learn how to create a "Hello World" design in Verilog and SystemVerilog using the initial block, parameters, or tasks. These examples will help you get started with these languages.
Advanced SystemVerilog Applications for Digital Hardware
Explore advanced applications of SystemVerilog in digital hardware design and verification, including design modeling, testbench development, assertion-based verification, system-level modeling, and FPGA and ASIC development. Improve efficiency and achieve design goals with its powerful features.
7 Differences Between Verilog and SystemVerilog
Verilog and SystemVerilog are widely used in the electronic design automation industry. SystemVerilog is preferred for designing and verifying digital circuits due to its advanced features, such as better support for OOP, concurrency, assertions, and interfacing with foreign languages.